Implementation of partial reconfiguration projects using OpenPR on the xilinx development board ML507
Published 2014-10-23
Keywords
- OpenPR,
- Open-Source,
- Partial Reconfiguration,
- FPGA
How to Cite
Abstract
This paper demonstrates the evaluation of partial reconfiguration projects implementation using OpenPR -an Open-source partial reconfiguration toolkit alternative-, on the Xilinx embedded system development board ML507. Results of the OpenPR repository counter example project are reproduced, and a new project targeting a different FPGA device, the v5fx70t, is created. Configuration files for static and partial design are generated and implemented in the ML507, getting a non-proper working in the board. This led to the native circuit description files check in FPGA EDITOR -a Xilinx FPGA routing tool- to verify the correct placement of the busmacros into the design-. Then debugging on-chip stage is done using Chipscope to test the signals state inside the FPGA in each design component as registers and busmacros. Observations are made based on these tests. Finally, conclusions of all the observation process are integrated into this evaluation.
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References
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